1. Field of the Invention
The present invention relates to a high-frequency bipolar transistor structure, and to a related manufacturing process.
2. Discussion of the Related Art
Sophisticated techniques are employed to fabricate high-frequencies bipolar transistors, with cutoff frequency higher than 20 GHz, propagation delays below 40 ps and speed-power products of about 40 fJ. Such techniques involve, for example, dielectric or trench isolation, multiple polysilicon layers, self-aligned processes making use of SiO.sub.2 or composite material spacers, rapid thermal processes (RTP), and so on.
High-performance Double PolySilicon Self-Aligned Transistors (DPSSATs) feature shallow junctions, with the emitter region formed by diffusion of dopants from an overlaying second polysilicon layer into the intrinsic base region; this last is surrounded by a heavily doped extrinsic base region, which is formed by diffusion of dopants from a first polysilicon layer into an epitaxial layer. The second and first polysilicon layers are respectively contacted by metal emitter and base electrodes. The intrinsic base can be formed by implantation, or by diffusion of dopants through the second polysilicon layer.
A review of such transistors can be found in P. C. Hunt, "Bipolar device design for high density high performance applications", Proceedings of IEDM 1989, 791-794, which is incorporated herein by reference.
To improve the AC performance of these transistors, their distributed base resistance (r.sub.bb) should be reduced. In this way, the charge/discharge time of the emitter-base junction capacitance would be decreased, and the dynamic behavior of the transistors improved. Further, the Noise Figure (NF) would be significantly reduced.
To further improve the speed performance the extrinsic base region should be shallower than the intrinsic base. The influence of the ratio of the extrinsic base to the intrinsic base junction depths is described in R. Dekker et al, "Charge Sharing Effects in Bipolar Transistors with Sub-half-micron Emitter Widths", Proceedings of IEDM 1990, 29-32, which is incorporated herein by reference. A shallower extrinsic base region would also allow a reduction in the base-collector junction parasitic capacitance, since the distance between the junction and the buried layer would increase, and the depletion region would be wider.
In view of the state of the art discussed, it is an object of the present invention to provide a high-frequency bipolar transistor structure with improved speed performance.